RISC-V: Add vluxei64 C API intrinsic testcases
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Sun, 29 Jan 2023 23:08:30 +0000 (07:08 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Mon, 30 Jan 2023 16:46:19 +0000 (00:46 +0800)
commitafd7265818081276d7bc4c104b4e6efbc8013211
tree58c431b2484d9d3c85c7e5b00c3322f45974c7fc
parent0451ce4444dc5c9f84dd323b228e707323399487
RISC-V: Add vluxei64 C API intrinsic testcases

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vluxei64_v-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_m-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_m-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_m-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vluxei64_v_tumu-3.c: New test.
18 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_m-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_m-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_m-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_mu-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_mu-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_mu-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tu-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tu-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tu-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tum-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tum-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tum-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tumu-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tumu-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vluxei64_v_tumu-3.c [new file with mode: 0644]