[ bfd/ChangeLog ]
authorChris Demetriou <cgd@google.com>
Tue, 31 Dec 2002 07:29:29 +0000 (07:29 +0000)
committerChris Demetriou <cgd@google.com>
Tue, 31 Dec 2002 07:29:29 +0000 (07:29 +0000)
commitaf7ee8bfa91b92e0357687808979175f511bacc3
tree000d9febdd65ea93f23a9b7dab88550b14678f49
parent7ee21aad7db971f20f2dce387d56b72a5fd889e2
[ bfd/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.

[ binutils/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.

[ gas/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry.  Run new tests mentioned above.

[ include/elf/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* mips.h (E_MIPS_ARCH_32R2): New define.

[ include/opcode/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.

[ opcodes/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll".  Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
31 files changed:
bfd/ChangeLog
bfd/aoutx.h
bfd/archures.c
bfd/bfd-in2.h
bfd/cpu-mips.c
bfd/elfxx-mips.c
binutils/ChangeLog
binutils/doc/binutils.texi
gas/ChangeLog
gas/config/tc-mips.c
gas/configure
gas/configure.in
gas/doc/as.texinfo
gas/doc/c-mips.texi
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/cp0-names-mips32r2.d [new file with mode: 0644]
gas/testsuite/gas/mips/hwr-names-mips32r2.d [new file with mode: 0644]
gas/testsuite/gas/mips/hwr-names-numeric.d [new file with mode: 0644]
gas/testsuite/gas/mips/hwr-names.s [new file with mode: 0644]
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/mips32r2-ill.l [new file with mode: 0644]
gas/testsuite/gas/mips/mips32r2-ill.s [new file with mode: 0644]
gas/testsuite/gas/mips/mips32r2.d [new file with mode: 0644]
gas/testsuite/gas/mips/mips32r2.s [new file with mode: 0644]
include/elf/ChangeLog
include/elf/mips.h
include/opcode/ChangeLog
include/opcode/mips.h
opcodes/ChangeLog
opcodes/mips-dis.c
opcodes/mips-opc.c