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(parent: b26abca) | patch
[AMDGPU][MachineVerifier] Alignment check for fp32 packed math instructions
authorChristudasan Devadasan <Christudasan.Devadasan@amd.com>
Wed, 16 Mar 2022 12:03:02 +0000 (17:33 +0530)
committerChristudasan Devadasan <Christudasan.Devadasan@amd.com>
Thu, 17 Mar 2022 02:51:35 +0000 (08:21 +0530)
commitaf717d4acac81b3abef6d76123b41d96c2bc7356
treed4354a179191cf7aae8116d109b1c3d90b4fb852tree | snapshot
parentb26abcad81e4fc3b9c232495cd9e4eac36e6a192commit | diff
[AMDGPU][MachineVerifier] Alignment check for fp32 packed math instructions

The fp32 packed math instructions are introduced in gfx90a.
If their vector register operands are not properly aligned, the
verifier should flag them. Currently, the verifier failed to
report it and the compiler ended up emitting a broken assembly.
This patch fixes that missed case in TII::verifyInstruction.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D121794
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir diff | blob | history
Domain: System / Toolchain;