[RISCV] Fix missing def operand when creating VSETVLI pseudos
authorFraser Cormack <fraser@codeplay.com>
Tue, 8 Dec 2020 09:20:28 +0000 (09:20 +0000)
committerFraser Cormack <fraser@codeplay.com>
Wed, 9 Dec 2020 09:35:28 +0000 (09:35 +0000)
commitaf5fd658952a7f1d9d2a1007217755bd04b4dd4e
tree55dd2e65de134a8be424037015811063e965b007
parent13e4e5ed59c92d81ee5fee55f20ecf1842ec8cf3
[RISCV] Fix missing def operand when creating VSETVLI pseudos

The register operand was not being marked as a def when it should be. No tests
for this in the main branch as there are not yet any pseudos without a
non-negative VLIndex.

Also change the type of a virtual register operand from unsigned to Register
and adjust formatting.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D92823
llvm/lib/Target/RISCV/RISCVISelLowering.cpp