local/mmc: dw_mmc: exynos: use the bits relevant to clock tuning

local/mmc: dw_mmc: exynos: use the bits relevant to clock tuning

There are bits relevant to clock tuning at CLKSEL register.
BIT[31:30] - CORE_CLK_TUNING
BIT[23:22] - DRV_CLK_TUNING
BIT[7:6] - SAMPLE_CLK_TUNING

These bits should be affected when card is tuning.
(In future, need to find the optimal values.)
At now, it used temporary these values.
(CORE_CLK_TUNING - 0x3, SAMPLE_CLK_TUNING - 0x1)

After sampling clock, these value have to set to 0.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>