dt-bindings: Add common bindings for ARM and RISC-V idle states
authorAnup Patel <anup.patel@wdc.com>
Thu, 10 Feb 2022 05:49:46 +0000 (11:19 +0530)
committermason.huo <mason.huo@starfivetech.com>
Tue, 5 Jul 2022 05:40:17 +0000 (13:40 +0800)
commitaf44fb074760e87051ee27bec17fc25ab83e1cc9
tree7608e1be44f0b977ff30021413623238b97b84bf
parentffcfa4cc7dbc098cea5a2297ef93b108e11dd8b5
dt-bindings: Add common bindings for ARM and RISC-V idle states

The RISC-V CPU idle states will be described in under the
/cpus/idle-states DT node in the same way as ARM CPU idle
states.

This patch adds common bindings documentation for both ARM
and RISC-V idle states.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
Documentation/devicetree/bindings/arm/psci.yaml
Documentation/devicetree/bindings/cpu/idle-states.yaml [moved from Documentation/devicetree/bindings/arm/idle-states.yaml with 74% similarity]
Documentation/devicetree/bindings/riscv/cpus.yaml