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(parent: b479ea4) | patch
[PowerPC][AIX] Allow VSX patterns to be 32-bit and 64-bit safe on P8+.
authorAmy Kwan <amy.kwan1@ibm.com>
Thu, 26 May 2022 14:24:12 +0000 (09:24 -0500)
committerAmy Kwan <amy.kwan1@ibm.com>
Fri, 27 May 2022 15:34:17 +0000 (10:34 -0500)
commitaf430944b3ba8ca55c4fd6b73f53c198c469ffee
tree9a92bbf0c20648775f667f1c3882cd21233fc249tree | snapshot
parentb479ea4b0afc537cd4608e95e9cafa15b803ed16commit | diff
[PowerPC][AIX] Allow VSX patterns to be 32-bit and 64-bit safe on P8+.

This patch updates two patterns involving `scalar_to_vector` and
`SCALAR_TO_VECTOR_PERMUTED` nodes to be safe for both 64-bit and 32-bit by
pulling the patterns out of the 64-bit specific guard. These patterns are
matched on POWER8 and above.

Differential Revision: https://reviews.llvm.org/D125389
llvm/lib/Target/PowerPC/PPCInstrVSX.td diff | blob | history
llvm/test/CodeGen/PowerPC/aix_scalar_vector_permuted.ll diff | blob | history
llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll diff | blob | history
llvm/test/CodeGen/PowerPC/float-vector-gather.ll diff | blob | history
llvm/test/CodeGen/PowerPC/load-and-splat.ll diff | blob | history
llvm/test/CodeGen/PowerPC/load-v4i8-improved.ll diff | blob | history
llvm/test/CodeGen/PowerPC/pre-inc-disable.ll diff | blob | history
llvm/test/CodeGen/PowerPC/reduce_scalarization.ll diff | blob | history
llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll diff | blob | history
llvm/test/CodeGen/PowerPC/vec_insert_elt.ll diff | blob | history
Domain: System / Toolchain;