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(parent: f400b6c) | patch
drm/amdgpu/pm: add smu i2c implementation for navi1x (v5)
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 21 Jan 2021 19:17:34 +0000 (14:17 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 1 Jul 2021 04:24:39 +0000 (00:24 -0400)
commitaf01340bc423de0ca1cbfda90dbda71860702f68
treeda0ce0de5c0c1d36656fae8aba491cb84cfcce04tree | snapshot
parentf400b6cec81e98454e9e3d4e49e163154a99a68dcommit | diff
drm/amdgpu/pm: add smu i2c implementation for navi1x (v5)

And handle more than just EEPROMs.

v2: fix restart handling between transactions.
v3: handle 7 to 8 bit addr conversion
v4: Fix &req --> req. (Luben T)
v5: squash in i2c channel fix

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c diff | blob | history
Domain: System / Kernel;