ravb: Decrease TxFIFO depth of Q3 and Q2 to one
authorMasaru Nagai <masaru.nagai.vx@renesas.com>
Thu, 7 Mar 2019 10:24:47 +0000 (11:24 +0100)
committerDavid S. Miller <davem@davemloft.net>
Thu, 7 Mar 2019 17:31:05 +0000 (09:31 -0800)
commitae9819e339b451da7a86ab6fe38ecfcb6814e78a
tree3b661703928882496f9fa75a12aabb33d530c693
parent8a72b81e6df516847848556d0967aefa5457f11f
ravb: Decrease TxFIFO depth of Q3 and Q2 to one

Hardware has the CBS (Credit Based Shaper) which affects only Q3
and Q2. When updating the CBS settings, even if the driver does so
after waiting for Tx DMA finished, there is a possibility that frame
data still remains in TxFIFO.

To avoid this, decrease TxFIFO depth of Q3 and Q2 to one.

This patch has been exercised this using netperf TCP_MAERTS, TCP_STREAM
and UDP_STREAM tests run on an Ebisu board. No performance change was
detected, outside of noise in the tests, both in terms of throughput and
CPU utilisation.

Fixes: c156633f1353 ("Renesas Ethernet AVB driver proper")
Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com>
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[simon: updated changelog]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/ravb_main.c