intel/genxml: Fix SLICE_HASH_TABLE struct on XeHP.
authorFrancisco Jerez <currojerez@riseup.net>
Wed, 21 Jul 2021 21:30:28 +0000 (14:30 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Tue, 11 Jan 2022 02:27:41 +0000 (18:27 -0800)
commitae5fa3f51834926632377647d8559fabc078c9ec
tree386872b558e13417c9bbb8b82b9f55d8e604b9fe
parenta748b264e8a52eca5bbfd5b9fdb0d281bcc9f0f5
intel/genxml: Fix SLICE_HASH_TABLE struct on XeHP.

It's now an array with 7 tables, each table is intended to specify the
pixel pipe hashing behavior for every possible slice count between 2
and 8, however that doesn't actually work, among other reasons due to
hardware bugs that will cause the GPU to erroneously access the table
at the wrong index in some cases, so in practice all 7 tables need to
be initialized to the same value.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
src/intel/genxml/gen125.xml