perf/x86: Make Intel KNC use full 40-bit width of counters
authorVince Weaver <vincent.weaver@maine.edu>
Wed, 17 Oct 2012 17:03:21 +0000 (13:03 -0400)
committerIngo Molnar <mingo@kernel.org>
Wed, 24 Oct 2012 10:00:48 +0000 (12:00 +0200)
commitae5ba47a990a18c869d66916fd72fb334c45cf91
treeca443900763ca1ad5bfd06a2d1017bb3f15be958
parent032c3851f51141e30de02ed0bc50a7743dfd776d
perf/x86: Make Intel KNC use full 40-bit width of counters

Early versions of Intel KNC chips have a bug where bits above 32
were not properly set.  We worked around this by only using the
bottom 32 bits (out of 40 that should be available).

It turns out this workaround breaks overflow handling.

The buggy silicon will in theory never be used in production
systems, so remove this workaround so we get proper overflow
support.

Signed-off-by: Vince Weaver <vincent.weaver@maine.edu>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: eranian@gmail.com
Cc: Meadows Lawrence F <lawrence.f.meadows@intel.com>
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171302140.23243@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_knc.c