fpga: dfl: Allow Port to be linked to FME's DFL
authorMatthew Gerlach <matthew.gerlach@linux.intel.com>
Thu, 5 May 2022 10:06:17 +0000 (06:06 -0400)
committerXu Yilun <yilun.xu@intel.com>
Tue, 10 May 2022 08:05:38 +0000 (16:05 +0800)
commitae23f746d7442909a19bd43397b567145d6e5db3
treea9fd2fa3bcb41b23ee96dbbfe589c1804c6fd7b1
parent2b28c9e0fe97fa2bae2ab52540a2970c0d3bdf8d
fpga: dfl: Allow Port to be linked to FME's DFL

Currently we use PORTn_OFFSET to locate PORT DFLs, and PORT DFLs are not
connected FME DFL. But for some cases (e.g. Intel Open FPGA Stack device),
PORT DFLs are connected to FME DFL directly, so we don't need to search
PORT DFLs via PORTn_OFFSET again. If BAR value of PORTn_OFFSET is 0x7
(FME_PORT_OFST_BAR_SKIP) then driver will skip searching the DFL for that
port. If BAR value is invalid, return -EINVAL.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Link: https://lore.kernel.org/r/20220505100617.703672-1-tianfei.zhang@intel.com
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
drivers/fpga/dfl-pci.c
drivers/fpga/dfl.h