GBE: Implement instruction compact.
authorRuiling Song <ruiling.song@intel.com>
Tue, 15 Apr 2014 08:53:17 +0000 (16:53 +0800)
committerZhigang Gong <zhigang.gong@intel.com>
Mon, 21 Apr 2014 01:09:40 +0000 (09:09 +0800)
commitae1e342c5bf7e0c6e325313aefffa3bd168e5678
tree4d4c5c14f133730e9602ac33621825481b84f1dc
parent6e08fb89c08e3ff11ed9b7222a1e1bfe8cb6fb9d
GBE: Implement instruction compact.

A native GEN ASM would takes 2*64bit, but GEN also support compact instruction
which only takes 64bit. To make code easily understood, GenInstruction now only
stands for 64bit memory, and use GenNativeInstruction & GenCompactInstruction
to represent normal(native) and compact instruction.

After this change, it is not easily to map SelectionInstruction distance to ASM distance.
As the instructions in the distance maybe compacted. To not introduce too much
complexity, JMP, IF, ENDIF, NOP will NEVER be compacted.

Some experiment in luxMark shows it could reduce about 20% instruction memory.
But it is sad that no performance improvement observed.

Signed-off-by: Ruiling Song <ruiling.song@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
backend/src/CMakeLists.txt
backend/src/backend/gen/gen_mesa_disasm.c
backend/src/backend/gen_context.cpp
backend/src/backend/gen_defs.hpp
backend/src/backend/gen_encoder.cpp
backend/src/backend/gen_encoder.hpp
backend/src/backend/gen_insn_compact.cpp [new file with mode: 0644]
backend/src/backend/gen_insn_selection.cpp
backend/src/backend/gen_reg_allocation.cpp
backend/src/backend/gen_register.hpp