sparc64: Make sure %pil interrupts are enabled during hypervisor yield.
authorDavid S. Miller <davem@davemloft.net>
Mon, 24 Mar 2014 18:45:12 +0000 (14:45 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 27 Apr 2014 00:15:36 +0000 (17:15 -0700)
commitadf6de0646c0b2bda53874970b076a4f0ea63cd5
tree0534334eb082cf89d103dd49978dd1396c4157d2
parent4c0d2e83fdc6743ba7d76ac2d2a311b2e2cbc1d7
sparc64: Make sure %pil interrupts are enabled during hypervisor yield.

[ Upstream commit cb3042d609e30e6144024801c89be3925106752b ]

In arch_cpu_idle() we must enable %pil based interrupts before
potentially invoking the hypervisor cpu yield call.

As per the Hypervisor API documentation for cpu_yield:

Interrupts which are blocked by some mechanism other that
pstate.ie (for example %pil) are not guaranteed to cause
a return from this service.

It seems that only first generation Niagara chips are hit by this
bug.  My best guess is that later chips implement this in hardware
and wake up anyways from %pil events, whereas in first generation
chips the yield is implemented completely in hypervisor code and
requires %pil to be enabled in order to wake properly from this
call.

Fixes: 87fa05aeb3a5 ("sparc: Use generic idle loop")
Reported-by: Fabio M. Di Nitto <fabbione@fabbione.net>
Reported-by: Jan Engelhardt <jengelh@inai.de>
Tested-by: Jan Engelhardt <jengelh@inai.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/sparc/kernel/process_64.c