HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings
authorZhichang Yuan <yuanzhichang@hisilicon.com>
Wed, 21 Mar 2018 22:23:02 +0000 (17:23 -0500)
committerBjorn Helgaas <helgaas@kernel.org>
Wed, 4 Apr 2018 13:42:48 +0000 (08:42 -0500)
commitadf38bb0b5956ab5469acb1ca981a9287c7ad1d8
treec08d2e7f88c69883ae7aff65647e0c9d9589e928
parent65af618d2c559f8eb19d80d03a23029651a59de4
HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings

The low-pin-count (LPC) interface of Hip06/Hip07 accesses I/O port space of
peripherals.

Implement the LPC host controller driver which performs the I/O operations
on the underlying hardware.  We don't want to touch existing drivers such
as ipmi-bt, so this driver applies the indirect-IO introduced in the
previous patch after registering an indirect-IO node to the indirect-IO
devices list which will be searched by the I/O accessors to retrieve the
host-local I/O port.

The driver config is set as a bool instead of a tristate.  The reason here
is that, by the very nature of the driver providing a logical PIO range, it
does not make sense to have this driver as a loadable module.  Another more
specific reason is that the Huawei D03 board which includes Hip06 SoC
requires the LPC bus for UART console, so should be built in.

Tested-by: dann frazier <dann.frazier@canonical.com>
Signed-off-by: Zou Rongrong <zourongrong@huawei.com>
Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Rob Herring <robh@kernel.org> # dts part
Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt [new file with mode: 0644]
drivers/bus/Kconfig
drivers/bus/Makefile
drivers/bus/hisi_lpc.c [new file with mode: 0644]