arm: mvebu: update RTC values for PCIe memory wrappers
authorChris Packham <chris.packham@alliedtelesis.co.nz>
Wed, 26 Feb 2020 06:53:50 +0000 (19:53 +1300)
committerStefan Roese <sr@denx.de>
Tue, 14 Apr 2020 11:16:42 +0000 (13:16 +0200)
commitad91fdfff0bd6ea471afe838e0f6d58ed898694e
tree722cf6cb54222ad87a8f0f5ab91f3f90b8b22790
parent201a500deccd2375e663d9266f2ae0173d173a81
arm: mvebu: update RTC values for PCIe memory wrappers

Update the RTC (Read Timing Control) values for PCIe memory wrappers
following an ERRATA (ERRATA# TDB). This means the PCIe accesses will
used slower memory Read Timing, to allow more efficient energy
consumption, in order to lower the minimum VDD of the memory.  Will lead
to more robust memory when voltage drop occurs (VDDSEG)

The code is based on changes from Marvell's U-Boot, specifically:

https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/20cd2704072512de176e048970f2883db901674b
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/eb608a7c8dd0d42b87601a61b9c0cc5615ab94b2
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c4af19ae2bf08cf6e450e741ce4f04d402a5cb6b

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
arch/arm/mach-mvebu/include/mach/cpu.h
arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
arch/arm/mach-mvebu/spl.c