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(parent: d254264) | patch
drm/amd/pp: Implement get_max_high_clocks for CI/VI
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 8 Nov 2017 08:39:00 +0000 (16:39 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 10 Jan 2018 20:44:55 +0000 (15:44 -0500)
commitad8cec7df5d4bf3b1109fabbb1d61663857045ae
tree6825d3ca0010c12b2294fe40be084d04914302c0tree | snapshot
parentd25426495f69be24b4f7b1da1c66ba6a34e49cddcommit | diff
drm/amd/pp: Implement get_max_high_clocks for CI/VI

v2: add table length check.

DC component expect PP to give max engine clock and
memory clock through pp_get_display_mode_validation_clocks
on DGPU as well.

This patch can fix MultiGPU-Display blank
out with 1 IGPU-4k display and 2 DGPU-two 4K
displays.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c diff | blob | history
Domain: System / Kernel;