projects / platform / kernel / linux-starfive.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8521db4) | patch
mlxsw: reg: Add cwtp & cwtpm registers
authorNogah Frankel <nogahf@mellanox.com>
Mon, 6 Nov 2017 06:23:44 +0000 (07:23 +0100)
committerDavid S. Miller <davem@davemloft.net>
Wed, 8 Nov 2017 03:23:38 +0000 (12:23 +0900)
commitad53fa06c126d2d739563802cc412cdcc9c32e63
treeee5d8186d020ef1984342767bc1cdaa255e5a432tree | snapshot
parent8521db4c7e155d12fb280686c0552e47f77e9110commit | diff
mlxsw: reg: Add cwtp & cwtpm registers

This patch adds 2 new registers:
 - Congestion WRED ECN TClass Profile Register [CWTP]
 - Congestion WRED ECN TClass and Pool Mapping Register [CWTPM]

These registers would later be needed to offload RED-related
functionality to the HW.

Signed-off-by: Yuval Mintz <yuvalm@mellanox.com>
Signed-off-by: Nogah Frankel <nogahf@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
Domain: System / Kernel;