[mlir] Split out a new ControlFlow dialect from Standard
authorRiver Riddle <riddleriver@gmail.com>
Fri, 4 Feb 2022 04:59:43 +0000 (20:59 -0800)
committerRiver Riddle <riddleriver@gmail.com>
Sun, 6 Feb 2022 22:51:16 +0000 (14:51 -0800)
commitace01605e04d094c243b0cad873e8919b80a0ced
treefaa5d3f41ca352cbb474413225b5afa570d3f303
parentedca177cbeb66bc0f4cb1b1458633b57c1ee33a5
[mlir] Split out a new ControlFlow dialect from Standard

This dialect is intended to model lower level/branch based control-flow constructs. The initial set
of operations are: AssertOp, BranchOp, CondBranchOp, SwitchOp; all split out from the current
standard dialect.

See https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061

Differential Revision: https://reviews.llvm.org/D118966
239 files changed:
flang/include/flang/Optimizer/Support/InitFIR.h
flang/include/flang/Tools/CLOptions.inc
flang/lib/Lower/CMakeLists.txt
flang/lib/Optimizer/CodeGen/CodeGen.cpp
flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
flang/lib/Optimizer/Transforms/RewriteLoop.cpp
flang/test/Fir/Todo/select_case_with_character.fir
flang/test/Fir/convert-to-llvm.fir
flang/test/Fir/memref-data-flow.fir
flang/tools/bbc/CMakeLists.txt
flang/tools/bbc/bbc.cpp
flang/tools/fir-opt/CMakeLists.txt
flang/tools/tco/CMakeLists.txt
flang/tools/tco/tco.cpp
mlir/benchmark/python/common.py
mlir/docs/BufferDeallocationInternals.md
mlir/docs/Diagnostics.md
mlir/docs/DialectConversion.md
mlir/docs/Dialects/emitc.md
mlir/docs/LangRef.md
mlir/docs/PatternRewriter.md
mlir/docs/Rationale/Rationale.md
mlir/docs/Tutorials/Toy/Ch-6.md
mlir/docs/includes/img/branch_example_post_move.svg
mlir/docs/includes/img/branch_example_pre_move.svg
mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp
mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp
mlir/include/mlir/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.h [new file with mode: 0644]
mlir/include/mlir/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRV.h [new file with mode: 0644]
mlir/include/mlir/Conversion/Passes.h
mlir/include/mlir/Conversion/Passes.td
mlir/include/mlir/Conversion/SCFToControlFlow/SCFToControlFlow.h [new file with mode: 0644]
mlir/include/mlir/Conversion/SCFToStandard/SCFToStandard.h [deleted file]
mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
mlir/include/mlir/Dialect/CMakeLists.txt
mlir/include/mlir/Dialect/ControlFlow/CMakeLists.txt [new file with mode: 0644]
mlir/include/mlir/Dialect/ControlFlow/IR/CMakeLists.txt [new file with mode: 0644]
mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlow.h [new file with mode: 0644]
mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.h [new file with mode: 0644]
mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td [new file with mode: 0644]
mlir/include/mlir/Dialect/SCF/SCFOps.td
mlir/include/mlir/Dialect/StandardOps/IR/Ops.h
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/include/mlir/InitAllDialects.h
mlir/lib/Conversion/CMakeLists.txt
mlir/lib/Conversion/ControlFlowToLLVM/CMakeLists.txt [new file with mode: 0644]
mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp [new file with mode: 0644]
mlir/lib/Conversion/ControlFlowToSPIRV/CMakeLists.txt [new file with mode: 0644]
mlir/lib/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRV.cpp [new file with mode: 0644]
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
mlir/lib/Conversion/LinalgToLLVM/CMakeLists.txt
mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
mlir/lib/Conversion/PassDetail.h
mlir/lib/Conversion/SCFToControlFlow/CMakeLists.txt [moved from mlir/lib/Conversion/SCFToStandard/CMakeLists.txt with 51% similarity]
mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp [moved from mlir/lib/Conversion/SCFToStandard/SCFToStandard.cpp with 89% similarity]
mlir/lib/Conversion/ShapeToStandard/ConvertShapeConstraints.cpp
mlir/lib/Conversion/StandardToLLVM/CMakeLists.txt
mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt
mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRVPass.cpp
mlir/lib/Dialect/Async/Transforms/AsyncRuntimeRefCounting.cpp
mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
mlir/lib/Dialect/Async/Transforms/CMakeLists.txt
mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocation.cpp
mlir/lib/Dialect/CMakeLists.txt
mlir/lib/Dialect/ControlFlow/CMakeLists.txt [new file with mode: 0644]
mlir/lib/Dialect/ControlFlow/IR/CMakeLists.txt [new file with mode: 0644]
mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp [new file with mode: 0644]
mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp
mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
mlir/lib/Dialect/SCF/SCF.cpp
mlir/lib/Dialect/SparseTensor/Pipelines/CMakeLists.txt
mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
mlir/lib/Dialect/StandardOps/CMakeLists.txt
mlir/lib/Dialect/StandardOps/IR/Ops.cpp
mlir/lib/Target/Cpp/TranslateRegistration.cpp
mlir/lib/Target/Cpp/TranslateToCpp.cpp
mlir/test/Analysis/test-alias-analysis.mlir
mlir/test/Analysis/test-dominance.mlir
mlir/test/Analysis/test-liveness.mlir
mlir/test/CAPI/ir.c
mlir/test/Conversion/AsyncToLLVM/convert-to-llvm.mlir
mlir/test/Conversion/ControlFlowToSPIRV/cf-ops-to-spirv.mlir [new file with mode: 0644]
mlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir [moved from mlir/test/Conversion/SCFToStandard/convert-to-cfg.mlir with 77% similarity]
mlir/test/Conversion/ShapeToStandard/convert-shape-constraints.mlir
mlir/test/Conversion/StandardToLLVM/convert-funcs.mlir
mlir/test/Conversion/StandardToLLVM/func-memref.mlir
mlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir
mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
mlir/test/Dialect/Affine/invalid.mlir
mlir/test/Dialect/Async/async-runtime-ref-counting.mlir
mlir/test/Dialect/Async/async-to-async-runtime-eliminate-blocking.mlir
mlir/test/Dialect/Async/async-to-async-runtime.mlir
mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir
mlir/test/Dialect/ControlFlow/canonicalize.mlir [moved from mlir/test/Dialect/Standard/canonicalize-cf.mlir with 81% similarity]
mlir/test/Dialect/ControlFlow/invalid.mlir [moved from mlir/test/Dialect/Standard/parser.mlir with 92% similarity]
mlir/test/Dialect/ControlFlow/ops.mlir [moved from mlir/test/Dialect/Standard/ops.mlir with 68% similarity]
mlir/test/Dialect/GPU/all-reduce-max.mlir
mlir/test/Dialect/GPU/all-reduce.mlir
mlir/test/Dialect/GPU/outlining.mlir
mlir/test/Dialect/Linalg/canonicalize.mlir
mlir/test/Dialect/Linalg/comprehensive-module-bufferize-invalid.mlir
mlir/test/Dialect/Linalg/detensorize_br_operands.mlir
mlir/test/Dialect/Linalg/detensorize_if.mlir
mlir/test/Dialect/Linalg/detensorize_while.mlir
mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
mlir/test/Dialect/Linalg/detensorize_while_pure_cf.mlir
mlir/test/Dialect/OpenMP/ops.mlir
mlir/test/Dialect/SCF/canonicalize.mlir
mlir/test/Dialect/SCF/for-loop-to-while-loop.mlir
mlir/test/Dialect/SCF/ops.mlir
mlir/test/Dialect/Standard/canonicalize.mlir
mlir/test/Dialect/Standard/func-bufferize.mlir
mlir/test/IR/invalid.mlir
mlir/test/IR/parser.mlir
mlir/test/IR/region.mlir
mlir/test/IR/traits.mlir
mlir/test/IR/visitors.mlir
mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-1d.mlir
mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-2d.mlir
mlir/test/Integration/Dialect/Linalg/CPU/benchmark_matmul.mlir
mlir/test/Integration/Dialect/Linalg/CPU/matmul-vs-matvec.mlir
mlir/test/Integration/Dialect/Linalg/CPU/rank-reducing-subview.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-comprehensive-bufferize.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert-multiple-uses.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert.mlir
mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
mlir/test/Integration/Dialect/Memref/memref_abi.c
mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pytaco_utils.py
mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf-full.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-ext.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli-full.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir
mlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-dot.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-broadcast.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-constant-mask.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-contraction.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-create-mask-v4i1.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-create-mask.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-expand.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-extract-strided-slice.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-flat-transpose-col.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-flat-transpose-row.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-fma.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-gather.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-insert-strided-slice.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-maskedload.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-maskedstore.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-matrix-multiply-col.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-matrix-multiply-row.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-outerproduct-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-outerproduct-i64.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-print-int.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i4.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i64.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-si4.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-ui4.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-scan.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-scatter.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-shape-cast.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-shuffle.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-sparse-dot-matvec.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-sparse-saxpy-jagged-matvec.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-1d.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-2d.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-3d.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-to-loops.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-write.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-transpose.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-vector-distribute.mlir
mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
mlir/test/Integration/GPU/CUDA/shuffle.mlir
mlir/test/Integration/GPU/ROCM/vecadd.mlir
mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
mlir/test/Target/Cpp/control_flow.mlir
mlir/test/Target/Cpp/invalid.mlir
mlir/test/Transforms/buffer-hoisting.mlir
mlir/test/Transforms/buffer-loop-hoisting.mlir
mlir/test/Transforms/canonicalize-block-merge.mlir
mlir/test/Transforms/canonicalize-dce.mlir
mlir/test/Transforms/canonicalize.mlir
mlir/test/Transforms/control-flow-sink.mlir
mlir/test/Transforms/cse.mlir
mlir/test/Transforms/inlining.mlir
mlir/test/Transforms/normalize-memrefs.mlir
mlir/test/Transforms/promote-buffers-to-stack.mlir
mlir/test/Transforms/sccp-callgraph.mlir
mlir/test/Transforms/sccp.mlir
mlir/test/Transforms/test-legalizer-full.mlir
mlir/test/mlir-cpu-runner/async-error.mlir
mlir/test/mlir-cpu-runner/async.mlir
mlir/test/mlir-cpu-runner/bare-ptr-call-conv.mlir
mlir/test/mlir-cpu-runner/copy.mlir
mlir/test/mlir-cpu-runner/memref-reinterpret-cast.mlir
mlir/test/mlir-cpu-runner/memref-reshape.mlir
mlir/test/mlir-cpu-runner/sgemm-naive-codegen.mlir
mlir/test/mlir-cpu-runner/unranked-memref.mlir
mlir/test/mlir-cpu-runner/utils.mlir
mlir/test/mlir-lsp-server/hover.test
mlir/test/mlir-opt/async.mlir
mlir/test/mlir-opt/commandline.mlir
mlir/test/mlir-reduce/multiple-function.mlir
mlir/test/mlir-reduce/simple-test.mlir
mlir/test/python/execution_engine.py
mlir/test/python/integration/dialects/linalg/opsrun.py
mlir/test/python/ir/blocks.py
mlir/test/python/ir/dialects.py