rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash
authorHugh Cole-Baker <sigmaris@gmail.com>
Sun, 22 Nov 2020 13:03:45 +0000 (13:03 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Thu, 21 Jan 2021 03:53:25 +0000 (11:53 +0800)
commitacc57ecf05500d2ed47f0d3898245d0029e1cc0c
treeb582198697c5235c56b4f1c32646ef12d26636ef
parent83433fdab4920e206700bca33b9040c7978afc9d
rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash

SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
configs/roc-pc-mezzanine-rk3399_defconfig
configs/roc-pc-rk3399_defconfig