RISC-V: Fix counter restart during overflow for RV32
authorAtish Patra <atishp@rivosinc.com>
Mon, 11 Jul 2022 17:46:28 +0000 (10:46 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Aug 2022 21:58:07 +0000 (14:58 -0700)
commitacc1b919f47926b089be21b8aaa29ec91fef0aa2
tree11058347c96ea9e53bac3d4a107478b36e1677af
parentf2906aa863381afb0015a9eb7fefad885d4e5a56
RISC-V: Fix counter restart during overflow for RV32

Pass the upper half of the initial value of the counter correctly
for RV32.

Fixes: 4905ec2fb7e6 ("RISC-V: Add sscofpmf extension support")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220711174632.4186047-2-atishp@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
drivers/perf/riscv_pmu_sbi.c