Fix signed multiplication with overflow fallback.
authorRanjeet Singh <Ranjeet.Singh@arm.com>
Wed, 26 Apr 2017 13:41:43 +0000 (13:41 +0000)
committerRanjeet Singh <Ranjeet.Singh@arm.com>
Wed, 26 Apr 2017 13:41:43 +0000 (13:41 +0000)
commitacbd4e141fdbbdec11831026a187987102dfa910
tree6b05eeff32be102062f561a28617896450390eea
parenta4b4e9388cedc7da13c37e8939609786486731ce
Fix signed multiplication with overflow fallback.

For targets that don't have ISD::MULHS or ISD::SMUL_LOHI for the type
and the double width type is illegal, then the two operands are
sign extended to twice their size then multiplied to check for overflow.
The extended upper halves were mismatched causing an incorrect result.
This fixes the mismatch.

A test was added for ARM V6-M where the bug was detected.

Patch by James Duley.

Differential Revision: https://reviews.llvm.org/D31807

llvm-svn: 301404
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/test/CodeGen/ARM/v6m-smul-with-overflow.ll [new file with mode: 0644]