projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 0cc32dd) | patch
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
authorDavid Green <david.green@arm.com>
Fri, 22 Feb 2019 12:23:31 +0000 (12:23 +0000)
committerDavid Green <david.green@arm.com>
Fri, 22 Feb 2019 12:23:31 +0000 (12:23 +0000)
commitacb628b2afb4b43dd0224c393f1ff47abd3b9045
tree223e13b3ebc8f61820963caf6736ea99f6fe8218tree | snapshot
parent0cc32dd4a13472702181e41fc17c8161c4999534commit | diff
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs

This adds a number of missing Thumb1 opcodes so that the peephole optimiser can
remove redundant CMP instructions.

Reapplying this after the first attempt broke non-thumb1 code as the t2ADDri
instruction can be used with frame indices. In thumb1 we use tADDframe.

Differential Revision: https://reviews.llvm.org/D57833

llvm-svn: 354667
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
llvm/test/CodeGen/ARM/intrinsics-overflow.ll diff | blob | history
llvm/test/CodeGen/Thumb/peephole-cmp.mir [new file with mode: 0644] blob
llvm/test/CodeGen/Thumb2/peephole-cmp.mir [new file with mode: 0644] blob
Domain: System / Toolchain;