RISC-V: Target support for z*inx extension.
authorJiawei <jiawei@iscas.ac.cn>
Thu, 20 Oct 2022 09:32:33 +0000 (17:32 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Thu, 27 Oct 2022 03:17:29 +0000 (11:17 +0800)
commitac96e9068ce7dcaca992fde7f1551ffe8837b723
treed4ded6505d0add885b06ecdf65320967fc4e5f65
parente09335728d3f9bc177eac2f7dff79715e0aa67c9
RISC-V: Target support for z*inx extension.

Support 'TARGET_ZFINX' with float instruction pattern and builtin function.
Reuse 'TARGET_HADR_FLOAT',  'TARGET_DOUBLE_FLOAT' and 'TARGET_ZHINX' patterns.

gcc/ChangeLog:

* config/riscv/iterators.md (TARGET_ZFINX):New target.
(TARGET_ZDINX): Ditto.
(TARGET_ZHINX): Ditto.
* config/riscv/riscv-builtins.cc (AVAIL): Ditto.
(riscv_atomic_assign_expand_fenv): Ditto.
* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Ditto.
* config/riscv/riscv.md: Ditto.
gcc/config/riscv/iterators.md
gcc/config/riscv/riscv-builtins.cc
gcc/config/riscv/riscv-c.cc
gcc/config/riscv/riscv.md