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[ARM] FP16 VSEL codegen
authorSjoerd Meijer <sjoerd.meijer@arm.com>
Wed, 11 Apr 2018 09:28:04 +0000 (09:28 +0000)
committerSjoerd Meijer <sjoerd.meijer@arm.com>
Wed, 11 Apr 2018 09:28:04 +0000 (09:28 +0000)
commitac96d7c4b33a1bac52eeac27afc23e6671a2c44e
tree8a6b3cb43722b54b60a5eeae94d3ca6159383388tree | snapshot
parentc552619fc107bd30313b776d818f7e5423200c71commit | diff
[ARM] FP16 VSEL codegen

This is a follow up of rL327695 to instruction select more variants of VSELGT
and VSELGE, for which it is necessary to custom lower SELECT.

More work is required in this area, which will be addressed soon:
- more variants need to be regression tested, but this depends on the next point.
- first LowerConstantFP need to be adjusted for fp16 values.

Differential Revision: https://reviews.llvm.org/D45205

llvm-svn: 329788
llvm/lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
llvm/test/CodeGen/ARM/fp16-instructions.ll diff | blob | history
Domain: System / Toolchain;