projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 5006d82) | patch
[PowerPC][GISel]fcmp support
authorChen Zheng <czhengsz@cn.ibm.com>
Tue, 3 Jan 2023 09:44:03 +0000 (09:44 +0000)
committerChen Zheng <czhengsz@cn.ibm.com>
Thu, 5 Jan 2023 07:45:29 +0000 (07:45 +0000)
commitac93a4e77d1e60958b775ce5c68dd4b81d0e2050
tree7c656bb11c70af0101fc5ec7ed71edff7e8b0ccbtree | snapshot
parent5006d82329c2d78b245127024a9f613236b459bccommit | diff
[PowerPC][GISel]fcmp support

This patch also includes:
1: CRRegBank support
2: Some workarounds in PPC table gen for anyext/setcc patterns
   selection.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D140878
llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp diff | blob | history
llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp diff | blob | history
llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp diff | blob | history
llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h diff | blob | history
llvm/lib/Target/PowerPC/GISel/PPCRegisterBanks.td diff | blob | history
llvm/lib/Target/PowerPC/PPCGenRegisterBankInfo.def diff | blob | history
llvm/lib/Target/PowerPC/PPCInstrInfo.td diff | blob | history
llvm/test/CodeGen/PowerPC/GlobalISel/fcmp.ll [new file with mode: 0644] blob
Domain: System / Toolchain;