[AMDGPU] Fix failure in VCC spilling
authorCarl Ritson <carl.ritson@amd.com>
Wed, 17 Jun 2020 10:38:25 +0000 (19:38 +0900)
committerCarl Ritson <carl.ritson@amd.com>
Wed, 17 Jun 2020 11:11:15 +0000 (20:11 +0900)
commitac8a2f132b010f92e4094b302c87e4f55d1a4458
tree84df0ba3291744504d672f3f26f9646019937964
parent547b6da73cc234e0d9f5236c27ba6e4ba76869f9
[AMDGPU] Fix failure in VCC spilling

Spills of VCC (SGPR64) will fail with new SGPR spill code,
because super register is not correctly resolved.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D81224
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir [new file with mode: 0644]