[AArch64][1/2] Add fmul-by-power-of-2+fcvt optimisation

[AArch64][1/2] Add fmul-by-power-of-2+fcvt optimisation

	* config/aarch64/aarch64.md
	(*aarch64_fcvt<su_optab><GPF:mode><GPI:mode>2_mult): New pattern.
	* config/aarch64/aarch64-simd.md
	(*aarch64_fcvt<su_optab><VDQF:mode><fcvt_target>2_mult): Likewise.
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle above patterns.
	(aarch64_fpconst_pow_of_2): New function.
	(aarch64_vec_fpconst_pow_of_2): Likewise.
	* config/aarch64/aarch64-protos.h (aarch64_fpconst_pow_of_2): Declare
	prototype.
	(aarch64_vec_fpconst_pow_of_2): Likewise.
	* config/aarch64/predicates.md (aarch64_fp_pow2): New predicate.
	(aarch64_fp_vec_pow2): Likewise.

	* gcc.target/aarch64/fmul_fcvt_1.c: New test.
	* gcc.target/aarch64/fmul_fcvt_2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@229085 138bc75d-0d04-0410-961f-82ee72b054a4