testsuite: aarch64: Add zero-high-half tests for narrowing shifts
authorJonathan Wright <jonathan.wright@arm.com>
Tue, 15 Jun 2021 14:03:09 +0000 (15:03 +0100)
committerJonathan Wright <jonathan.wright@arm.com>
Wed, 16 Jun 2021 13:21:34 +0000 (14:21 +0100)
commitac6c858d072016ad2c409f1593fa290ad0d87e11
treeeef1de2738773eff88c2655054be9e3dcba4e58f
parentd7deee423f993bee8ee440f6fe0c9126c316c64b
testsuite: aarch64: Add zero-high-half tests for narrowing shifts

Add tests to verify that Neon narrowing-shift instructions clear the
top half of the result vector. It is sufficient to show that a
subsequent combine with a zero-vector is optimized away - leaving
just the narrowing-shift instruction.

gcc/testsuite/ChangeLog:

2021-06-15  Jonathan Wright  <jonathan.wright@arm.com>

* gcc.target/aarch64/narrow_zero_high_half.c: New test.
gcc/testsuite/gcc.target/aarch64/narrow_zero_high_half.c [new file with mode: 0644]