[AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare
authorSanjay Patel <spatel@rotateright.com>
Wed, 9 May 2018 23:08:15 +0000 (23:08 +0000)
committerSanjay Patel <spatel@rotateright.com>
Wed, 9 May 2018 23:08:15 +0000 (23:08 +0000)
commitac3951a7351b2a3144ad103fb3c759b9415f55f1
tree95784f093f5d4e08adbdfb678d73879e227d97b2
parented43f18b55a1fdf30d73a1c08b273177774fdeee
[AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare

This is a follow-up to D45986. As suggested there, we should match the "all-bits-set"
pattern in addition to "any-bits-set".

This was a little more complicated than I thought it would be initially because the
"and 1" instruction can be anywhere in the chain. Hopefully, the code comments make
that logic understandable, but if you see a way to simplify or improve that, it's
most appreciated.

This transforms patterns that emerge from bitfield tests as seen in PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098

I think it would also help reduce the large test from:
D46336
D46595
but we need something to reassociate that case to the forms we're expecting here first.

Differential Revision: https://reviews.llvm.org/D46649

llvm-svn: 331937
llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
llvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll
llvm/test/Transforms/PhaseOrdering/bitfield-bittests.ll