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drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 18 Jul 2019 14:50:50 +0000 (17:50 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 20 Sep 2019 18:46:22 +0000 (21:46 +0300)
commitac0f01cee94702d49aad3ff4d0607024fa34c9dd
tree050d0076dcbdbc2923904f18d922b506889a0953tree | snapshot
parentb10d1173eecf811d5293c5097f1025fc20915171commit | diff
drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW

On HSW the pipe colorspace is configured via PIPECONF
(as opposed to PIPEMISC in BDW+). Let's configure+readout
that stuff correctly.

Enabling YCbCr 4:4:4 output will now be a simple matter of
setting crtc_state->output_format appropriately in the encoder
.compute_config().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190718145053.25808-10-ville.syrjala@linux.intel.com
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
drivers/gpu/drm/i915/display/intel_display.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
Domain: System / Kernel;