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(parent: 6c7ecc5) | patch
[AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned...
authorCraig Topper <craig.topper@gmail.com>
Wed, 9 Nov 2016 05:31:53 +0000 (05:31 +0000)
committerCraig Topper <craig.topper@gmail.com>
Wed, 9 Nov 2016 05:31:53 +0000 (05:31 +0000)
commitabf50415373851c740f3a864093595f469d9c7bb
treee5e915f3ff01ed5f7527587c545d4ea8bba4fa9atree | snapshot
parent6c7ecc53413909f9dda5bee6b3a3d1255f98d83dcommit | diff
[AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract.

llvm-svn: 286341
llvm/test/CodeGen/X86/avx512-extract-subvector.ll diff | blob | history
Domain: System / Toolchain;