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(parent: 4981b82) | patch
dt-bindings: mailbox: Add Xilinx IPI Mailbox
authorWendy Liang <wendy.liang@xilinx.com>
Fri, 22 Feb 2019 00:36:34 +0000 (16:36 -0800)
committerJassi Brar <jaswinder.singh@linaro.org>
Thu, 7 Mar 2019 02:34:20 +0000 (20:34 -0600)
commitabdd85b6ba7322299d69ab68e1fc6849f6998492
treee1d747ef362b890a5e4154d3f9f5289f0eafda2etree | snapshot
parent4981b82ba2ff87df6a711fcd7a233c615df5fc79commit | diff
dt-bindings: mailbox: Add Xilinx IPI Mailbox

Xilinx ZynqMP IPI(Inter Processor Interrupt) is a hardware block
in ZynqMP SoC used for the communication between various processor
systems.

Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt [new file with mode: 0644] blob
Domain: System / Kernel;