drivers: w1-gpio: add flag to force read-polling while delaying

drivers: w1-gpio: add flag to force read-polling while delaying

On Pi 5, the link to RP1 will bounce in and out of L1 depending on
inactivity timers at both the RC and EP end. Unfortunately for
bitbashing 1-wire, this means that on an otherwise idle Pi 5 many of the
reads/writes to GPIO registers are delayed by up to 8us which causes
mis-sampling of read data and trashes write bits.

By issuing dummy reads at a rate greater than the link inactivity
timeout while spinning on a delay, PCIe stays in L0 which does not incur
additional latency.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>