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(parent: 5824a4f) | patch
Added 0x0D to 2-byte opcode extension table for prefetch* variants
authorKay Tiong Khoo <kkhoo@perfwizard.com>
Tue, 12 Feb 2013 00:19:12 +0000 (00:19 +0000)
committerKay Tiong Khoo <kkhoo@perfwizard.com>
Tue, 12 Feb 2013 00:19:12 +0000 (00:19 +0000)
commitab588efe420a9c3f9ad820d40db88f557661acdc
treeacbece9242169e8a19373ed399d9746338188a26tree | snapshot
parent5824a4f1b0962bfe7a80d382d0ed9ce2050d3d88commit | diff
Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

llvm-svn: 174920
llvm/lib/Target/X86/X86Instr3DNow.td diff | blob | history
llvm/utils/TableGen/X86RecognizableInstr.cpp diff | blob | history
Domain: System / Toolchain;