RISC-V: Don't include Zicsr or Zifencei in I from ACPI
authorPalmer Dabbelt <palmer@rivosinc.com>
Tue, 11 Jul 2023 22:46:00 +0000 (15:46 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 12 Jul 2023 17:04:40 +0000 (10:04 -0700)
commitab2dbc7accedc2e98eb7d8b8878d337e3b36c95d
treeea2c17ddbed6515ad1cec7cf346e9118239cbd05
parentb690e266dae2f85f4dfea21fa6a05e3500a51054
RISC-V: Don't include Zicsr or Zifencei in I from ACPI

ACPI ISA strings are based on a specification after Zicsr and Zifencei
were split out of I, so we shouldn't be treating them as part of I.  We
haven't release an ACPI-based kernel yet, so we don't need to worry
about compatibility with the old ISA strings.

Fixes: 07edc32779e3 ("RISC-V: always report presence of extensions formerly part of the base ISA")
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Link: https://lore.kernel.org/r/20230711224600.10879-1-palmer@rivosinc.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/cpufeature.c