riscv: dts: microchip: icicle: re-jig fabric peripheral addresses
authorConor Dooley <conor.dooley@microchip.com>
Tue, 27 Sep 2022 11:19:19 +0000 (12:19 +0100)
committerConor Dooley <conor.dooley@microchip.com>
Tue, 27 Sep 2022 17:53:58 +0000 (18:53 +0100)
commitab291621a8b85269496ae9a964b6d49cd1e030c8
tree0335955f3f1dbdaa65a408b383db0428551ce515
parent6fc655ed4986f88b91e3f7b339222fc1c4ffba08
riscv: dts: microchip: icicle: re-jig fabric peripheral addresses

When users try to add onto the reference design, they find that the
current addresses that peripherals connected to Fabric InterConnect
(FIC) 3 use are restrictive. For the v2022.09 reference design, the
peripherals have been shifted down, leaving more contiguous address
space for their custom IP/peripherals.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi