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[PowerPC] Relax the checking on AND/AND8 in isSignOrZeroExtended.
authorSean Fertile <sfertile@ca.ibm.com>
Wed, 29 Nov 2017 04:09:29 +0000 (04:09 +0000)
committerSean Fertile <sfertile@ca.ibm.com>
Wed, 29 Nov 2017 04:09:29 +0000 (04:09 +0000)
commitaab3ef76d9c46440e461088418a46447cafbaf9c
tree65afde0c11366080e8afe1d85a7a3ea925bcd455tree | snapshot
parent971c6f32fe5fc934a783774a8d01a11782590406commit | diff
[PowerPC] Relax the checking on AND/AND8 in isSignOrZeroExtended.

Separate the handling of AND/AND8 out from PHI/OR/ISEL checking. The reasoning
is the others need all their operands to be sign/zero extended for their output
to also be sign/zero extended. This is true for AND and sign-extension, but for
zero-extension we only need at least one of the input operands to be zero
extended for the result to also be zero extended.

Differential Revision: https://reviews.llvm.org/D39078

llvm-svn: 319289
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp diff | blob | history
llvm/test/CodeGen/PowerPC/zext-and-cmp.ll [new file with mode: 0644] blob
Domain: System / Toolchain;