[X86][AMX] Replace LDTILECFG with PLDTILECFGV on auto-config.
authorLuo, Yuanke <yuanke.luo@intel.com>
Fri, 27 May 2022 02:54:37 +0000 (10:54 +0800)
committerLuo, Yuanke <yuanke.luo@intel.com>
Fri, 27 May 2022 08:38:35 +0000 (16:38 +0800)
commitaaaf9cede774a3a82770e88a8096b8c605bdb2c0
tree33448db954b2e4cc4b4d1ea396e44076dfa46861
parentcde101d0225f4ef32254561c1c8d201d05336471
[X86][AMX] Replace LDTILECFG with PLDTILECFGV on auto-config.

There is intrinsic `@llvm.x86.ldtilecfg` which is lowered to LDTILECFG.
This intrinsic is open for user to configure tile registers by
themselves. There is a chance that `@llvm.x86.ldtilecfg` would be mixed
with the new AMX intrinsics which depend on compiler to configure tile
registers. Separate pusedo instruction PLDTILECFGV would avoid
unexpected behavious when `@llvm.x86.ldtilecfg` is mixed with new AMX
intrinsics. Though user should not mix the two programming model,
compiler should avoid crash or UB when they are mixed.

Differential Revision: https://reviews.llvm.org/D126519
13 files changed:
llvm/lib/Target/X86/X86FastPreTileConfig.cpp
llvm/lib/Target/X86/X86FastTileConfig.cpp
llvm/lib/Target/X86/X86InstrAMX.td
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86PreTileConfig.cpp
llvm/lib/Target/X86/X86TileConfig.cpp
llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir
llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll