x86/tsx: Add a feature bit for TSX control MSR support
authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Tue, 15 Nov 2022 19:17:05 +0000 (11:17 -0800)
committerBorislav Petkov <bp@suse.de>
Mon, 21 Nov 2022 13:08:20 +0000 (14:08 +0100)
commitaaa65d17eec372c6a9756833f3964ba05b05ea14
treee4269b4cb4a96d557d281375cdf52d879769f6d5
parent47894e0fa6a56a42be6a47c767e79cce8125489d
x86/tsx: Add a feature bit for TSX control MSR support

Support for the TSX control MSR is enumerated in MSR_IA32_ARCH_CAPABILITIES.
This is different from how other CPU features are enumerated i.e. via
CPUID. Currently, a call to tsx_ctrl_is_supported() is required for
enumerating the feature. In the absence of a feature bit for TSX control,
any code that relies on checking feature bits directly will not work.

In preparation for adding a feature bit check in MSR save/restore
during suspend/resume, set a new feature bit X86_FEATURE_TSX_CTRL when
MSR_IA32_TSX_CTRL is present. Also make tsx_ctrl_is_supported() use the
new feature bit to avoid any overhead of reading the MSR.

  [ bp: Remove tsx_ctrl_is_supported(), add room for two more feature
    bits in word 11 which are coming up in the next merge window. ]

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: <stable@kernel.org>
Link: https://lore.kernel.org/r/de619764e1d98afbb7a5fa58424f1278ede37b45.1668539735.git.pawan.kumar.gupta@linux.intel.com
arch/x86/include/asm/cpufeatures.h
arch/x86/kernel/cpu/tsx.c