drm/i915/display/vrr: Configure and enable VRR in modeset enable
authorManasi Navare <manasi.d.navare@intel.com>
Fri, 22 Jan 2021 23:26:39 +0000 (15:26 -0800)
committerManasi Navare <manasi.d.navare@intel.com>
Mon, 25 Jan 2021 23:23:17 +0000 (15:23 -0800)
commitaa52b39dc554de07ef7a9eb5c80b487ebbde7e7c
tree68f629c4750ac13208aa9190f20c367e49681ed2
parentdc89bb86facfe82e7f9cc3f8230afad24ec6b538
drm/i915/display/vrr: Configure and enable VRR in modeset enable

This patch computes the VRR parameters from VRR crtc states
and configures them in VRR registers during CRTC enable in
the modeset enable sequence.

v2:
* Remove initialization to 0 (Jani N)
* Use correct pipe %c (Jani N)

v3:
* Remove debug prints (Ville)
* Use cpu_trans instead of pipe for TRANS_VRR regs (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122232647.22688-10-manasi.d.navare@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_vrr.c
drivers/gpu/drm/i915/display/intel_vrr.h