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(parent: 92d8946) | patch
aarch64: Implement TLBIP 128-bit instruction
authorVictor Do Nascimento <victor.donascimento@arm.com>
Wed, 15 Nov 2023 17:21:39 +0000 (17:21 +0000)
committerVictor Do Nascimento <victor.donascimento@arm.com>
Tue, 9 Jan 2024 10:16:40 +0000 (10:16 +0000)
commita9e2cefdf00202e0ba59825bd66a01ec41ac3ed0
treeb62a75e4faa6bd99b6af833302c239d1457d2e74tree | snapshot
parent92d8946670571118cccdbcd36d35300af33da4afcommit | diff
aarch64: Implement TLBIP 128-bit instruction

The addition of 128-bit page table descriptors and, with it, the
addition of 128-bit system registers for these means that special
"invalidate translation table entry" instructions are needed to cope
with the new 128-bit model.  This is introduced with the `tlbpi'
instruction, implemented here.
gas/config/tc-aarch64.c diff | blob | history
include/opcode/aarch64.h diff | blob | history
opcodes/aarch64-tbl.h diff | blob | history
Domain: System / Toolchain;