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(parent: 11a1423) | patch
[RISCV] Gate simm32 materialisation pattern and SW pattern on IsRV32
authorAlex Bradbury <asb@lowrisc.org>
Wed, 3 Oct 2018 11:04:59 +0000 (11:04 +0000)
committerAlex Bradbury <asb@lowrisc.org>
Wed, 3 Oct 2018 11:04:59 +0000 (11:04 +0000)
commita9ac5994b1ec3b17639c755117c5c56fd40e3e8a
treef92ae078cb211fafb3964e5110d078c0756351detree | snapshot
parent11a1423348551058fb5683fee643c3b19094de54commit | diff
[RISCV] Gate simm32 materialisation pattern and SW pattern on IsRV32

These patterns are not correct for RV64.

llvm-svn: 343677
llvm/lib/Target/RISCV/RISCVInstrInfo.td diff | blob | history
Domain: System / Toolchain;