[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers
authorSudakshina Das <sudi.das@arm.com>
Wed, 26 Sep 2018 10:02:28 +0000 (11:02 +0100)
committerRichard Earnshaw <Richard.Earnshaw@arm.com>
Tue, 9 Oct 2018 14:39:29 +0000 (15:39 +0100)
commita97330e723cf3c639a951329ac5fe2797528249b
tree9085698ab114327b7807d6763fead55c0f4b8d6e
parentff6054520cc86ac2f34c21bcc2e44ede50b56cdc
[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers

This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.

This patch adds the new system registers SCXTNUM_ELx and ID_PFR2_EL1.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

* opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
(AARCH64_FEATURE_ID_PFR2): New.
(AARCH64_ARCH_V8_5): Add both by default.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

* aarch64-opc.c (aarch64_sys_regs): New entries for
scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
(aarch64_sys_reg_supported_p): New checks for above.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

* testsuite/gas/aarch64/sysreg-4.s: Test registers
scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
gas/ChangeLog
gas/testsuite/gas/aarch64/illegal-sysreg-4.l
gas/testsuite/gas/aarch64/sysreg-4.d
gas/testsuite/gas/aarch64/sysreg-4.s
include/ChangeLog
include/opcode/aarch64.h
opcodes/ChangeLog
opcodes/aarch64-opc.c