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[media] mt9p031: Add support for PLL bypass
authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Sun, 9 Feb 2014 20:31:47 +0000 (17:31 -0300)
committerMauro Carvalho Chehab <m.chehab@samsung.com>
Mon, 24 Feb 2014 16:12:36 +0000 (13:12 -0300)
commita970449e40789a0056424668da5b56f57569ea73
treeea77264963dd3c5c9ce814d215f9fbefe944c9e8tree | snapshot
parente8e45593c920a05b1f4b9d94738a84039b9b4f22commit | diff
[media] mt9p031: Add support for PLL bypass

When the input clock frequency is out of bounds for the PLL, bypass the
PLL and just divide the input clock to achieve the requested output
frequency.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
drivers/media/i2c/mt9p031.c diff | blob | history
Domain: System / Kernel;