[X86] Teach shuffle lowering to use 256-bit SHUF128 when possible.

[X86] Teach shuffle lowering to use 256-bit SHUF128 when possible.

This allows masked operations to be used and allows the register allocator to use YMM16-31 if necessary.

As a follow up I'll look into teaching EVEX->VEX how to turn this back into PERM2X128 if any of the additional features don't work out.

llvm-svn: 317403