[RISCV] Disable interleaving scalar loops in the loop vectorizer.
authorCraig Topper <craig.topper@sifive.com>
Thu, 23 Dec 2021 14:11:09 +0000 (08:11 -0600)
committerCraig Topper <craig.topper@sifive.com>
Thu, 23 Dec 2021 14:37:24 +0000 (08:37 -0600)
commita9486a40f7d18115682737b912f550ceef9b7d8d
tree242123d48779753e889e54baf14f645c0222dd7f
parenta3f50fb06dd467e54a62b371117eeecf88c78480
[RISCV] Disable interleaving scalar loops in the loop vectorizer.

The loop vectorizer can interleave scalar loops even if it doesn't
vectorize them. I don't believe we intended to enable this when
we enabled interleaving for vector instructions.

Disable interleaving for VF=1 like X86 and AMDGPU already do. Test
lifted from AMDGPU.

Differential Revision: https://reviews.llvm.org/D115975
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll [new file with mode: 0644]