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(parent: dd15640) | patch
drm/amd/display: Add save/restore PANEL_PWRSEQ_REF_DIV2
authorCharlene Liu <Charlene.Liu@amd.com>
Thu, 10 Mar 2022 22:20:43 +0000 (17:20 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Mar 2022 18:42:01 +0000 (14:42 -0400)
commita91b402d50072e4801b231925f33574f90e562ce
tree23eea18c08f2a4248db72e2440b4b8642fd2c7f9tree | snapshot
parentdd15640bcee5a5fa74fc52557dd6220f48b01116commit | diff
drm/amd/display: Add save/restore PANEL_PWRSEQ_REF_DIV2

[why]
DCN31 has this in zstate save/restore sequence.
need for non_zstate supported ASIC

[how]
add this PANEL_PWRSEQ_REF_DIV2 to existing panel_cntl_hw_init structure.

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c diff | blob | history
drivers/gpu/drm/amd/display/dc/inc/hw/panel_cntl.h diff | blob | history
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h diff | blob | history
Domain: System / Kernel;