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(parent: b2f8ba0) | patch
[X86] Add a test case showing an issue in our addusw pattern matching.
authorCraig Topper <craig.topper@intel.com>
Sun, 19 Aug 2018 04:26:29 +0000 (04:26 +0000)
committerCraig Topper <craig.topper@intel.com>
Sun, 19 Aug 2018 04:26:29 +0000 (04:26 +0000)
commita85d7e927b5d97648f0ce6b64b3c0e179b27ee1e
tree32221e770380aae6f35e0bbe6fc71361630790aatree | snapshot
parentb2f8ba0decab026dd7f6cda5a19f62b5cf9bf98fcommit | diff
[X86] Add a test case showing an issue in our addusw pattern matching.

We are unable to handle a normal add followed by a saturing add with certain operand orders on the icmp.

llvm-svn: 340133
llvm/test/CodeGen/X86/sse2-intrinsics-canonical.ll diff | blob | history
Domain: System / Toolchain;