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(parent: ff0286c) | patch
dt-bindings: phy: Clarify ULPI PHY source clock
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Thu, 22 Feb 2018 14:38:25 +0000 (15:38 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 8 Mar 2018 14:09:36 +0000 (15:09 +0100)
commita7ca2a709dbce8ef712fc829f686672d0c0256bf
tree935e5bd38659835421b570f8215c94c207106098tree | snapshot
parentff0286cbccacc300f4fb47c60a9e5629889dda04commit | diff
dt-bindings: phy: Clarify ULPI PHY source clock

cdev2 is not actually a clock on Tegra20 but rather a pinmux pad group.
PLL_P_OUT4 is the source clock for the ULPI PHY and is output to the
DAP_MCLK2 pad.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt diff | blob | history
Domain: System / Kernel;